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Gm/ID Design Methodology

written by Yukidama on 2026-02-12

Some information about the Gm/ID design methodology. Useful as a handout for students or a cheat sheet.

Resources:

Enz, C.C., Krummenacher, F. & Vittoz, E.A. An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications. Analog Integr Circ Sig Process 8, 83–114 (1995). https://doi.org/10.1007/BF01239381

Seems to be the origin of the gm/id parameter. This parameter is first proposed as a indicator of inversion strength. SPICE simulation models such as BSIM3 and BSIM4 use this parameter and you can see it in the output of a DC sweep.

Boris Murmann popularized a design methodology based on the gm/id parameter: https://github.com/bmurmann/Book-on-gm-ID-design

Some other videos, books and slides that I found useful:

https://web02.gonzaga.edu/faculty/talarico/EE406/documents/gmid.pdf

Eric Yeh's videos on how to use gm/id for design, and how to extract the designing curves from a SPICE simulation: https://www.youtube.com/watch?v=horLp7FMTeA&list=PLQBJZzLTgobt8BlTD0spy4pPi2bccxw54

Usage

gm/id Region Description
< 5 Strong Inversion High \(V_{OV}\), High speed, high power.
5 ~ 20 Moderate Inversion Most Analog Circuits
20 ~ 30 Weak Inversion Low Power
> 30 Subthreshold Ultra Low Power, Very Slow

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Parameter Trend (typical) Why
\(g_m\) @ fixed \(I_D\) \(\uparrow\) \(g_m=\eta I_D\)
Current @ fixed \(g_m\) \(\downarrow\) \(I_D=g_m/\eta\)
Power @ fixed \(g_m\) \(\downarrow\) \(P\propto I_D\)
Intrinsic gain \(g_m / g_{DS}\) \(\uparrow\) then \(\downarrow\) \(g_{DS} \uparrow\) due to short channel effects
\(f_T\) \(\downarrow\) caps grow + weak inv slower
Small-signal BW of a stage depends \(g_m\) \(\uparrow\) but caps \(\uparrow\)
Slew rate no change @ fixed \(I\) \(SR=I/C\)
Thermal noise improves @ fixed \(I\) Current Noise \(\propto 1/g_m\)
1/f noise, mismatch usually improves Larger \(W\cdot L\)